Means and method for measuring the phase of an alternating electrical signal

ABSTRACT

A method and circuitry for measuring the phase difference between two alternating electrical signals wherein one of the signals maintains parameters which are known and the second of the signals bears an unknown, varying phase relationship with respect to the first signal. The integrate modes of a pair of three-mode integrators are simultaneously initiated by a signal responsive to an initial zero-crossing point of a half-cycle of a reference signal, and the hold mode of one of the integrators is initiated by a signal responsive to the next half-cycle zerocrossing point of the reference signal; the hold mode of the second integrator is initiated by a signal responsive to the initial zero-crossing point of a half-cycle of a variable-phase signal. The output signals from the integrators are coupled to an analog divider which output is selectively sampled by sample-andhold circuitry, and the output signal from the sample-and-hold circuitry is displayed on coupled indicating means. The command signal to the sample-and-hold circuitry is triggered by means responsive to the zero-crossing point of the half-cycle reference signal.

United States Patent [72] Inventors Henry Mlttel, Jr.

Arlington; Charles J. StalmnchJn, Grand Prllrie, both ol. Tex.

[2 l] Appl. No. 829,628

[22] Filed June 2, 1969 [4S] Patented July I3, I97] [73] Assignee L'IVAerospace Corporation Dallas, Tex.

[54] MEANS AND METHOD FOR MEASURING THE PHASE 0! AN ALTERNATINGELECTRICAL SIGNAL 17 Claims, 4 Drawlng Figs.

{52] US. Cl 324/83 A [3|] lnt.Cl. ..G0lr25/00 [50] Field 01 Search324/83 A;

[56] References Cited OTHER REFERENCES O Brien, E. M. "Integrating PhaseMeter." RCA TECHNI- CAL NOTE No. 799. Oct. 17, I968.

Primary ExaminerAlfred E. Smith AnorneysH. C. Goldwire and Charles W.McHugh ABSTRACT: A method and circuitry for measuring the phasedifference between two alternating electrical signals wherein one of thesignals maintains parameters which are known and the second of thesignals bears an unknown, varying phase relationship with respect to thefirst signal. The integrate modes of a pair of three-mode integratorsare simultaneously initiated by a signal responsive to an initialzero-crossing point of a half-cycle of a reference signal, and the holdmode of one of the integrators is initiated by a signal responsive tothe next half-cycle zero-crossing point of the reference signal; thehold mode of the second integrator is initiated by a signal responsiveto the initial zero-crossing point of a half-cycle of a variable phasesignal. The output signals from the integrators are coupled to an analogdivider which output is selectively sampled by sampleand-hold circuitry,and the output signal from the sample-and-hold circuitry is displayed oncoupled indicating means. The command signal to the sample-and-holdcircuitry is triggered by means responsive to the zero-crossing point ofthe half-cycle reference signal.

X lo l8 f 30 I l 1 so 5 I we I fi I DlFFERENTIATINGH 1 I L AMP YRIINS l4I2 is 25 I29 F 1 r L mv ScHmrT SINGLE'SHOT A .23 I rmooE a AMPmuuwlenmon 22 0c m5 3| 1 a 1' A l NTEGRATOR l T GRATOH 4| 42- 4s e i N ESINGLE-SHOT StNGLE-SHOT I P MULTWIBHATOR MULTlVlBRATOR l M DENOM'NATORNWEMTO l r Ta 4. 52

FLW mvmea AT FLOP M nuns -q I OlFFERENY/AHNG MAP AMP

PAIENIEI] JUL I 3 I971 SHEET 2 [IF 2 ||||||||V-||||| ITIII US UII IIIIIIIJII II II HH HI. HHIIIIHHHHHHHHMHHHMHH|||| S 9 5 6 W m 8 a \8 I! Llll \llurll IHI ll III-IIIIJII U L IH MUM H Ul l ifl ln HI 44444 I V I 8n 8 III III I FI |[l O O O OHO 0 E 0 X s 9 R R R S I) 2 E L L 5 f 0 0 OL L w L D E A I A R 5 T H E P O C 5 A N R T R) 8 B NT N OS 0 TG MN 0 L GE T W Y IU Efl E LL L AI GR E4 A q. HW W HWTM WQMUH N T I TL LL .N EWEl. P ER E I S I L H LU E L F F m IS T V M m "r M P UP W0 L WM 7 R LL MI M s A m m M 6 Mm 0 D m m A 5 E H SI R FL M FA m F F Fm F F FM P R F OIl I R 0 0 N G I I l N G I L E L T M T D "M W m H v m U U WP T U UU U L E0 Pm P PR P5 P P PM PM M PH P P P P0 F M mm w W Z W W m M M U M U o o oo O o 0 w 0 O o o 0 o INVENTORS HENRY I NMI )MITTEL, JR.

CHARLES J" STALMACH, JR.

ATTORNEY MEANS AND METHOD FOR MEASURING THE PHASE OF AN ALTERNATINGELECTRICAL SIGNAL This invention pertains to phase-measuring methods andapparatus and, more particularly, to phase-measuring methods andapparatus providing an indication of the phase of an unknown signal atleast once during each cycle of a reference signal to which it iscompared.

Within recent years there has been an increasing demand for apparatusfor measuring the phase angle of electrical signals, especially signalsof low frequency. To meet this demand, many new designs for electronicphase meters have been proposed. A difficulty associated with knowndesigns, however, is that each lacks a response time sufficiently shortto permit the accurate monitoring of rapidly changing phase angles ofthe electrical signals.

In prior phase meters it has been necessary to scan several successivecycles of a particun.n wave whose phase is to be determined in order toobtain a readout of the phase relationship. A phase meter is requiredfor many applications wherein an accurate phase reading can be made inresponse to no more than one cycle of the electrical wave.

It is an object of the invention to provide phase-measuring apparatuswhich is possessed of highly improved phase-measuring capacity.

A further object of the invention is to provide a phase meter having asufficiently fast response to permit the monitoring of phase changes ofan electrical wave occurring as often as every half-cycle of that wave.

An additional object is to provide an improved method for measuring thephase angle of an electrical wave.

A still further object is to provide phase-measuring apparatus usefulfor measuring the phase angle between an alternating reference signaland an alternating electrical signal during a particular cycle of thereference signal and for providing an indication of the phaserelationship during that cycle.

Another object is to provide a method for measuring the phaserelationship between an alternating reference signal and an alternatingelectrical signal during a particular cycle of the reference signal.

In accordance with these and other objects, the phase-measuringapparatus of the present invention comprises circuits providing a meansfor measuring the ratio of specifically defined time intervals which arerespectively associated with an input reference signal and with anotherinput signal, the phase of which is being measured, and the respectivecircuit produces an output signal which represents this ratio and whichis proportional to the phase angle between the two input signals. Sincethe phase angle of the reference signal is known, the ratio signal isthen applied to calibrated indicating means for displaying the phaseangle of the unknown input signal with respect to the phase angle of thereference signal.

A preferred embodiment of the invention utilizing the just describedtechnique comprises a pair ofintegrators for providing a pair of outputsignals respectively proportional to first and second time intervalswhere the first time interval is related to a first electrical wavewhich oscillates about a reference axis and, particularly, to the pointin time when the first wave crosses the reference axis beyond a givenstarting point; at the second point in time the same wave crosses thesame reference axis the second time. The second time interval is relatedto the point in time when the first electrical wave crosses thereference axis and the first point in time when the second electricalwave crosses the same axis subsequent to the crossing of the first wavewhen the second electrical wave is increasing in the same direction asthe first of the waves. These two integrator output signals respectivelyprovide the denominator and numerator inputs to an analog divider, theoutput of which is thus proportional to the ratio of these two timeintervals and, therefore, to the phase angle between the input referencesignal and the signal being measured.

Other specific features of the invention, as well as further objects andadvantages thereof, are more fully recited in the following detaileddescription taken in conjunction with the accompanying drawing, wherein:

FIG. I is a plot of two sinusoidally varying signals on the same timescale, with one of the signals lag ing the other;

FIG. 2 is a plot of two sinusoidally varying signals on the same timescale, with one of the signals lagging the other by more than FIG. 3 isa block schematic diagram of a preferred embodiment of the invention;and

FIG. 4 is a graph showing idealizer waveforms at various points in thecircuit illustrated in FIG. 3 and further illustrating aspects of theoperation of the circuit.

With reference to FIG. 1 and in accordance with the method of thisinvention, a reference signal (5 having a known configuration and havinga known relationship to a designated point in time is plotted on thesame time scale axis as a second signal (5,) having an unknown phaseangle with respect to E,,,. The phase angle may be constant or may varywithin limits, and the apparatus of this invention will provide anaccurate phase measurement.

As shown in FIG. 1, time interval I, is designated as the time delaybetween a crossing by E of a reference level about which E is alternatng (in this case zero volts) and at which point B is increasing inamplitude in a particular direction, and the next crossing of thereference level by the same signal. Time interval 1, is designated asthe time delay from the time E crosses the reference level and the timethat E, crosses the same level for the first time e .equent to the firstcrossing of E whereat E is changing in amplitude in the same directionas E, was changing at its first crossing. The phase angle of E, withrespect to E is proportional to the ratio of the time intervals, i.e.,!,/t,. The point at which E initially crosses the reference level can betaken as the starting time, 1,, to which all measurements are to berelated; thus, the phase angle of E is 0 with respect to r,,, and whenthe phase of E, differs from that of E by less than 180", the phaseangle of E, is rJt, times 180 with respect to t,. FIG. 2 illustrates thesituation where the phase difference between E, and E is more than 180.In this case, a convenient way to determine the phase relationship is toinvert E, (or E compute the phase difference between the first andsecond signals as suggested above, and then, add 180 to the computedresult. It will be ap arent that if all DC voltage components areremoved from the reference signal and from the unknown signal, thepoints where each alternating signal passes through the zero-voltagelevel may be called "zero-crossing points." While sine waves are usedthroughout this disclosure for purposes of convenience, the concept ofthis invention applies equally well to one-cycle-response phasemeasurement of signals having various other wave shapes.

A preferred embodiment of the invention is illustrated in Flu. 3 whereincircuitry I is employed to compute the ratio r,/t, (which ratio isrepresentative of the phase angle of the signal E,), which computationis preferably effected during every cycle of the reference signal.

Accordingly, in a preferred embodiment of this invention, the referencewave E and the unknown signal E, are respectively applied to inputterminals X and Y of circuitry l, which terminals are connectedrespectively to transformers l0 and 1]. Transformers I0 and I! serve todecouple the input signals from any DC voltage components, thusproducing sinusoidal waves at the transformer secondaries, which wavesalternate about the zero axis (see FIG. 1). Each transformer 10, 11 hasa connection to a signal ground in accordance with standard practice.Other means for decoupling the DC voltage components would be equallyuseful, in lieu of transformers. Intermediate the input terminal Y andthe transformer 11 is a switch 21 for inverting the input signal E, forsituations where E, differs in phase from E by more than 180. It isclear in the case of the switch 21, as in the case of transformer: 10and II, that other known means may be used to accomplish the invertingfunction.

The secondary windings of transformers l and 11 are thereafterrespectively coupled by way of conventional amplifiers 14 and to Schmitttriggers I2 and 13. The Schmitt triggers l2 and 13 are of the typepresently known in the art and produce a substantially square waveoutput signal which, in the embodiment shown, alternatively swingspositive and negative with respect to the zero-voltage level. Theduration of each one-half cycle of the square wave output of the triggerl2 precisely corresponds to the period of one-half cycle of E withpositive one-half cycles of the square wave corresponding to positiveone-half cycles of E With switch 21 in the noninverting position, theoutput of Schmitt trigger 13 corresponds similarly to B, Each trigger12, 13 operates to produce the described output so long as an inputsignal (E, or E is applied.

The output signals of triggers I2 and 13 are fed, respectively, toamplifiers l6 and 17. Amplifiers l6 and 17 are functional to amplify thecurrent of signals applied thereto, while amplifiers 14 and 15 arevoltage amplifiers functional to increase the voltage of the respectivesignals to a magnitude sufficient to drive the trigger circuits.

Three separate signal channels are coupled to the output of amplifier16; a first channel 30 couples the output of the amplifier 16 to the setinput (S) of a bistable flip-flop device 18, and the output of theflip-flop device is connected to a translator and inverter device 28.The translator and inverter device 28 has an output which is coupled tothe input terminal A of each of a pair of three-mode integrators 19, 20.A second channel 31 includes a single-shot multivibrator 25 having aninput connection coupled to the output of amplifier 16. The output ofthe multivibrator 25 is connected to an input connection oftranslator-inverter 29 whose output is in turn connected to an inputterminal B of integrator 19. The output of multivibrator 25 is alsocoupled through differentiating amplifier 50 to the reset terminal (R)of flip-flop device 18 and the "reset" tenninal (R) of flip-flop device45.

A third channel 32 includes two single-shot multivibrators 41, 42coupled in series, with the input of multivibrator 41 coupled to theoutput of amplifier l6 and the output of mu]- tivibrator 42 coupledthrough amplifier 43 to a first input terminal B ofa sample-and-holdmeans 40.

Each of the three-mode integrators has an input connected to a commonsource of DC voltage at 22, 23, and each has an output terminal coupled,respectively, to separate input terminals of analog divider means 52. Anoutput of analog divider means 52 is coupled to an input terminal A ofthe sample-and-hold means 40. The output of the sample-and-hold means 40is coupled to an appropriate readout device, for instance, a meter 60.

The output of amplifier 17 is connected through a differentiatingamplifier 72 to the set input (S) of flip-flop device 45, and the outputof flip-flop device 45 is coupled through a translator and invertermeans 46 to an input terminal B of the three-m ode integrator 20.

The three-mode integrators 19, are each characterized in operation bythe fact that a signal pulse of proper polarity and amplitude, appliedto the input terminal A, causes integration of the DC input voltage totake place therein, such that the output voltage of each deviceincreases in a linear manner so long as the pulse at terminal A isapplied. if a signal pulse of proper amplitude and polarity is appliedto terminal B, the integration stops and the voltage at the output ofthe integrator remains constant at the amplitude which the outputvoltage had achieved when the signal was applied to terminal B, so longas the signals are applied to terminals A and B. Various types ofthree-mode integrators known to the art may be used for the devices 19and 20, and one such device, a Model 3003/16 Three-Mode integrator,manufactured by Burr- Brown Research Corporation of Tucson, Arizona, wasused in the preferred embodiment shown.

Each of the flip-flops l8 and 45 is a conventional bistable devicewhich, upon the application of a pulse of energy of a proper magnitudeand polarity to the set input (S), produces a constant-level outputvoltage until the f1ip-flop is reset by the application of a secondpulse of proper polarity and magnitude to the reset input (R) thereof.When reset, the output of each respective flip-flop 18,45 is zero volts.

Each single-shot multivibrator 25, 41, 42 is characterized by the factthat a pulse of proper polarity and magnitude applied to the input ofeach respective unit causes the unit to produce a single output pulse ofknown amplitude, duration, and polarity; the output pulse of eachmultivibrator being produced in response to a change in voltage in apositive direction dv./dt.). For the reasons set forth below, the pulseproduced by multivibrator 25 is negative, 10 volts in amplitude, and 3milliseconds in duration, while the pulses produced by multivibrators41, 42 are each negative, 10 volts in amplitude, and l millisecond induration.

The differentiating amplifier 50 provides a negative output pulse ortrigger pulse of short duration corresponding to a change in voltage ina positive direction dv./dt.

The translator/inverter devices 28, 29, 46 are operative to scale,respectively, the voltage output of the flip-flop 18, the single-shotmultivibrator 25, and the flipflop 45 to a voltage level suitable forinput to integrators 19 and 20, and each such device inverts thepolarity of the signal applied thereto, again to make the signalscompatible with the polarity requirements of the integrators 19, 20.

The analog divider 52 to which the output signals from the integrators19 and 20 are fed produces an output voltage which is proportional tothe ratio of the two integrator signals applied thereto. While variousdevices known in the art may be employed for divider 52, one suitabledevice is a Model 4012/25 Analog Divider, manufactured and sold by BurrBrown Research Corporation.

The sample-and-hold means 40 is, as the name applies, a device which,upon receipt of a command signal generated in third channel 32, samplesthe ratio signal applied thereto from the integrators 19, 20 andproduces an output voltage which corresponds to the ratio-voltage inputand holds the output voltage until the next sample command is received.A typical device for use in the embodiment illustrated is a Sample andHold module, Model 1663/16, Burr-Brown Research Corporation.

The significance of the above-described function of each of theindividual modules and of the circuit connections is explained in thefollowing material relating to the operation of the embodimentillustrated.

The operation of the circuit 1 which is illustrated in FIG. 3 is bestunderstood with reference to the idealized wave shapes of certain of thefunctional components, which wave shapes are shown in FIG. 4. For thisreason, FIGS. 3 and 4 will be discussed together.

The reference signal, E is applied to the input terminal X, and theunknown signal [5,, whose phase with respect to E is to be determined,is applied to input terminal Y. E, is fed through switch 21 totransformer 11. Switch 21 is initially in the noninverting position (asshown), and transformers 10 and 11 are connected such that the signalappearing on the secondary of each transformer is in phase with thesignal applied to the primary. The transformers 10, 1 1 serve to removeany DC voltage components from the signals applied thereto. This ineffect causes the alternating signals E and E, to oscillate about zerovolts and establishes zero volts as a reference axis. With the DCcomponents removed, the input signal E is amplified by amplifier 14 andfed directly to the Schmitt trigger 12. In FIG. 4, curve illustrates atypical reference signal. The Schmitt trigger 12 produces a square waveoutput signal the period of which corresponds to the period of thereference signal 80 and which alternates positive and negative and inphase with the reference signal. Curve 82 illustrates the output signalproduced by Schmitt trigger 12. The output signal represented by curve82 is then fed to the amplifier 16 which amplifies the current of thesignal and produces a phase shift between the amplifier input and itsoutput; additionally, the signal is ofl'set by the amplifier in anegative direction so that the square wave alternates between a negativevalue (in the preferred embodiment l volts) and zero volts (see curve96). This signal is then fed to the flip-flop device 18 set input (S).

As previously set forth, an object of this invention is to produce aphase indication corresponding to the phase difference between twoalternating electrical signals which is updated every cycle; thus, indescribing the operation of the invention it is convenient to consideronly a single cycle of the respective waves involved. It follows thatthe initial crossing of the zero reference axis by the signal E isdesignated r,, and all other times (and phase relationships) will bereferenced to that point in time. It is clear from the foregoing thatwhen E is increasing in a positive direction at 2,, then the output ofamplifier [6 at time t. is negative and remains so for one-half cycle.This negative portion of the square wave when applied, as described, tothe flip-flop 18 causes the flip-flop to turn 0N and to produce at itsoutput terminal a negative voltage, which in the embodiment illustratedis about l 0 volts. This l0 volt signal is fed to translator/inverterunit 28 wherein the signal is again inverted and scaled down inmagnitude so that the output of inverter 28 is about +6 v., and thelevel and the polarity of the signal is thus rendered compatible withthe voltage and polarity of input terminals A of the integrators 19, 20.The DC voltage 22, 23 applied to the integrators is continuouslyavailable, and as the output of the inverter 28 is applied to therespective inputs A of the integrators 19, 20, the respectiveintegrators begin to integrate. The output curve 91 for integrator 19illustrates the result, which curve is more fully described in thematerial that follows.

Prior to the time that the signal from inverter 28 is applied to theinput terminal A of integrator 19, the integrator output is zero volts,and as soon as the inverter signal (from inverter 28) is applied toterminal A, the output of the integrator begins to rise and continues torise until the integration is stopped by the application of anappropriate signal to terminal B of the integraton When an appropriatesignal is applied to terminal B, integration ceases in the integrator19, and the output voltage thereof holds at the magnitude obtainedduring the integration period until a signal is removed from bothterminals A and B. In tegrator 20 is substantially identical withintegrator l9, and, therefore, it operates in the same manner; however,as is explained in the material that follows, the signal applied toterminal B derives from a difl'erent source than the signal that isapplied to terminal I! of the integrator 19. This is an importantdistinction, because, in this manner, the output voltage produced andheld by integrator 20 is made to correspond to the initial zero-crossingpoint of the signal E, where E, is increasing in the same direction thatE is increasing at time t,; thus, the output voltage of integrator 20corresponds to the time t, of curve 8!, and the output voltage producedand held by integrator 19 corresponds to the time t, of curve 80. Fromthese respective integrator outputs, then, the phase-difference betweenE and E, can be computed as previously described.

The hold command to be applied to input terminal B of integrator 19 isproduced in channel 31, which is connected to the output of amplifier16. The single-shot multivibrator receives the signal from amplifier 16,which signal, as previously described, is negative during the firstone-half cycle immediately following 1,. Also as previously described,the multivibrator 25 does not produce its single output pulse until thesignal applied at its input changes in a positive direction. The outputof amplifier 16 does not begin to go positive until the beginning of thesecond one-half cycle of the particular cycle of E in which the phaseanalysis is being made. Thus, a delay of one-half cycle is introduced,but at the end of the one-half cycle delay, the. multivibrator 25produces a 3 millisecond, negative pulse of about l0 volts, as shown bycurve 84. Curve 84 illustrates the timing involved wherein the 3millisecond, negative pulse produced begins at the end of the firstone-half cycle past I, and extends for 3 milliseconds thereafler(compare curves 80, 82, 96 to B4). The output of multivibrator 25 isapplied to inverter 29 which operates, as did inverter 28, to scale themultlvibrator output 10 volts) to a level compatible with the integratorand to invert the signal so that the polarity is also compatible (+6volts). As this signal is applied to the input terminal B of integrator19, the integration therein is stopped, and the integrator outputvoltage is held for at least 3 milliseconds (the duration of the controlpulse). The integrator l9 has been allowed to integrate and to produce acontinuously rising output voltage for a full one-half cycle before thehold pulse is applied to input terminal B; thus, the peak voltageobtained and held (refer to curve 9|) corresponds to the time period I,(refer to curve The signal applied to input terminal B of integrator 20is derived from the signal whose phase is to be determined, 5,, in thefollowing manner. The signal at the secondary of transformer ll is inphase with the signal E, applied to the input terminal Y. The signal isamplified by amplifier l5, and the Schmitt trigger 13 produces therefroma square wave output signal similar to that produced by trigger 12 but,in this case, in phase with the signal B, (see curve 83). The squarewave is amplified by amplifier 17 to produce a current gain and is fedto the differentiating amplifier 72. The output signal produced byamplifier I7 is in phase with the input thereto (as opposed to amplifier16, wherein the phase is reversed), but is otherwise similar to theoutput signal of amplifier 16. As the square wave signal is applied tothe differentiating amplifier 72 and changes state from negative to zeroat a point corresponding to the initial zero-crossing point of thesignal E, (where E, is increasing in the same direction that E wasincreasing at time t,,), the diflerentiating amplifier 72 produces anegative output pulse in response to the changing condition dv./dt. Thisnegative output signal is applied to flip-flop 45' to set the flip-flopin an ON condition such that it, in turn, produces a constant-leveloutput voltage of about l0 volts, This signal (-IO volts) is appliedthrough inverter 46, which operates similarly to inverters 28 and 29, tothe input terminal B of integrator 20. Integrator 20 therefore ceasesintegration and holds the output voltage previously generated untilflip-flop 45 is reset, and, simultaneously, the signal from inverter 28is removed from the input terminal A. Since the hold command applied tointegrator 20, terminal B, corresponds to the initial zero-crossingpoint of the signal E, (as described above), it follows, therefore, thatthe maximum voltage generated and held by integrator 20 (see curve 92)corresponds to the time period I, (see curve 81).

As previously described, the ratio of the respective integrator outputvoltages (r,lr,) is proportional to the phase difference between the twosignals-E and E therefore, the analog divider 52 functions to produce anoutput voltage proportional to this ratio by dividing the respectivesignals.

The output voltage from analog divider 52 is applied to sample-and-holdmeans 40st input terminal A, and [he means 40 operates upon theapplication of a command signal at input terminal 8 thereof to samplethe applied signal (from the divider 52), in a manner described in thefollowing material, and to hold the voltage obtained by sampling and toproduce an output voltage corresponding thereto until it is againcommanded to sample, whereupon, if the second voltage obtained bysampling has changed with respect to the first-sampled voltage, theoutput voltage produced by the means 40 changes accordingly (see curve94). The output voltage from the means-4t) is therefore continuallyupdated and is applied to a meter 60 or other indicating device. ln theembodiment illustrated, the sample command is provided once each cycle,as described below. with the important result that the phase readingdesired is produced for the first cycle of data available from thesignal l5, and is updated each cycle thereafter. This is an extremelyimportant result where a phase analysis is required and only a fewcycles of data relating to the unknown signal are available and is anequally important result where an analysis of phase between each signalis required as ohen as each cycle. The output of sample-and-hold meanscan be applied to a fast printing device, such as a computer with a lineprinter, so that the phase variations are recorded for further analysis.Curve 94 shows the output voltage produced by means 40 and illustratesthe response caused by changing conditions of E, (see curves 81 and 95);the curve 94 is negative solely because an inversion is produced by theBurr-Brown device used as means 40.

The signal which commands means 40 to sample during each cycle isgenerated as follows. The output of amplifier 16 is applied tosingle-shot multivibrator 4!. Again, as with multivibrator 25, there isa delay of one-half cycle before multivibrator 41 triggers. In the caseof multivibrator 4|, a negative output pulse of l millisecond isproduced (see curve 85) with the leading edge of the pulse correspondingto the second zero-crossing point (past t,,) of the reference signal Eand continuing for l millisecond thereafter. The output pulse ofmultivibrator 41 is then applied to multivibrator 42 which, similarly,produces a negative output pulse of l millisecond duration (see curve86) but whose leading edge corresponds with the trailing edge of thepulse produced by multivibrator 41 so that the pulse continues for lmillisecond after the pulse from multivibrator 4i shuts OFF (see curve86). The pulse produced by multivibrator 42 is then fed to thesample-andhold means 40 to command that unit to sample the outputvoltage of the divider 52. Multivibrators 41 and 42, therefore, acttogether to cause the means 40 to sample during (at approximately thecenter) the 3 millisecond holding period of integrator 19 (see curve 84)when the output voltage corresponds to the time interval I Since thevoltage corresponding to t,/t,, at the output of integrator 20, remainsconstant until the flip-flop 45 is reset, the reset mechanism describedbelow is designed to operate only after the expiration of the 3millisecond holding period of integrator 19 such that the voltagecorresponding to time period t, is available to divider 52simultaneously with the voltage corresponding to time interval r,, and,in this manner, a valid ratio reading is provided to the sample-and-holdmeans 40 by the divider.

Therefore, the output of integrator 19, representing time period I, (seecurve 91), is divided into the output of integrator 20, which outputrepresents time period t, (see curve 92), by divider 52 to produce avoltage output representing the ratio of the two time periods (see curve93), and the divider output is sampled during a time interval (see curve86) when the voltage output of each integrator I9, 20 corresponds to avalue related to its respective time period for a given cycle of thereference signal (E,,,). The sample-and-hold means 40 output (see curve94) changes as the sampled voltage changes at each sampling period;thus, a continuous one-cycle response is achieved.

When the phase between E and E, is greater than 180, the switch 21 isactivated to invert the signal E in this event, the phase differencebetween E and E, (inverted) is measured in the manner previouslydescribed, and I80 (or a voltage corresponding thereto) is added to theresult to obtain the true phase relationship between the signals. Theprocedure for changing the phase of E, in the latter case, ie over I80phase-difference, can be accomplished automatically by known equipment,if desired.

In keeping with the object of this invention, to maintain single-cycleresponse of a phase reading during the first and each subsequent cycleof a signal whose phase is to be determined, it is necessary to reseteach flip-flop I8, 45 at an appropriate time after a sample has beentaken by means 40 and before the end of the respective cycle; thus, adifferentiating amplifier 50 is coupled to the output of multivibrator25. As previously explained, the amplifier 50 responds to a change involtage in a positive direction dvJdt.) to produce a negative outputpulse (see curve 87). This output pulse is applied to the resetterminals (R) of flip-flops l8 and 45, and as a result, the flipflopseach change state and their output voltage goes to zero. The firstpositive-going voltage change in the output signal of multivibrator 25occurs at the trailing edge of the 3 millisecond, negative pulse, whenthe multivibrator switches OFF and its output returns from a negativevalue to zero volts; thus,

the flip-flops 18 and 45 are reset at the end of the 3 millisecondperiod and prior to the end of the first cycle of the reference signal EWhere the phase of the signal E, changes during the next cycle, a newset of time periods are established (see curve and a new phaserelationship involving times t, and t, is computed in the manner justdescribed, and the output of the sample-and-hold means 40 changescorrespondingly (see curve 94).

Various modifications may be made to the circuitry illustrated in FIG. 3consistent with the concept underlying the present invention. Forexample, the response of the present phase meter may be increasedtwofold by adding another full set of components similar to thoseillustrated in FIG. 3, wherein the new integrators, similar to 19 and20, are made to begin integration on the negative half cycles. Such acombined system would then provide a new phase reading every one-halfcycle as opposed to every full cycle for the apparatus previouslydescribed. Furthermore, the concept of the present invention ofmeasuring the ratio of time intervals associated with each of the inputsignals E and E may be carried out by providing appropriate triggeringon the peak amplitude points of the signals, rather than thezero-crossing points thereof. A major advantage of the phase-measuringscheme proposed is the capacity of the apparatus to measure the phaseangle of a signal whose phase is rapidly varying on a cycle by cycle (orhalf-cycle by half-cycle) basis rather than requiring the averaging ofthe phase difference between the signals over a substantially longerperiod of time. Equally important is the capacity of the deviceconstructed in accordance with this invention to measure and to providean indication of the phase difference between the signals during thefirst cycle sampled. Meaningful and accurate information is rapidlyobtained when only a few cycles of data are available for study.

A method for measuring the phase difference between the two alternatingelectrical signals, E and 5,, is accomplished by first producing a firstintermediate signal corresponding to the time interval t,, previouslydescribed. In the embodiment illustrated (FIG. 3), a voltage isgenerated which corresponds in amplitude to the time interval lg;however, other apparatus and other types of signals could be used. Forinstance, a digital signal representative of the time interval r, couldbe produced. A second step involves producing a second intermediatesignal similarly corresponding to the time interval previously defined.The third step would then be dividing the second intermediate signal bythe first intermediate signal to produce a ratio signal representativeof the ratio of the two time intervals (h/MZ). Again, the division couldbe accomplished digitally, and the ratio could be represented by adigital-type numerical readout. The final step of the method would beindicating the phase difference between the two electrical signals inresponse to the ratio signal produced.

Various other modifications to the disclosed embodiment and method, aswell as further embodiments of each, may become apparent to oneordinarily skilled in the art without departing from the spirit andscope of the invention as defined by the appended claims.

What we claim is:

1. Apparatus for measuring the phase angle between two alternatingelectrical signals, comprising:

a. first and second input means for respectively receiving said twoelectrical signals;

b. first circuit means coupled to said first input means for producingan output signal proportional to a first time interval between first andsecond reference points associated with one of said electrical signals;

c. second circuit means coupled to said second input means for producingan output signal proportional to a second time interval between saidfirst reference point and another reference p int a sociated with theother of said electrical signals;

d. dividing means coupled to said first and second circuit means fordividing the output signal of said second circuit means by the outputsignal of said first circuit means for providing an output signal fromsaid dividing means representative of the ratio of said second timeinterval to said first time interval; and

e. means coupled to said dividing means for indicating the phase anglebetween said electrical signals as a function of said ratio outputsignal.

2. The apparatus as described in claim 1 wherein said first and secondreference points are the zero-crossing points of said one electricalsignal, and said another reference point is a zero-crossing point ofsaid other electrical signal.

3. The apparatus claimed in claim I wherein at least one of thealternating electrical signals is a sinusoidal signal.

4. The apparatus as described in claim 3 wherein both electrical signalsare sinusoidal signals and wherein said first and second referencepoints are the peak amplitude points of said one sinusoidal signal, andsaid another reference point is a peak amplitude point of said othersinusoidal signal.

5. Phase-indicating apparatus, comprising:

a. first source means for providing a reference signal of knownfrequency and phase;

second source means for providing a signal of variable phase withrespect to said reference signal;

. first integrator means for integrating a first DC voltage applied tosaid first integrator means to produce, at the output of said firstintegrator means, a constant-level voltage corresponding to theintegration time of said first integrator means;

. second integrator means for integrating a second DC voltage applied tosaid second integrator means to produce, at the output of said secondintegrator means, a constant-level voltage corresponding to theintegration time of said second integrator means;

. first means for producing a first output pulse in response to oneportion of said reference signal and applying said output pulse to saidfirst and second integrator means, thereby to simultaneously initiatethe integration by each of said integrators; second means for producinga second output pulse in response to another portion of said referencesignal and applying said output pulse to said first integrator means toterminate integration therein and to hold the output of said firstintegrator at a constant signal level;

g. third means for producing a third output pulse in response to aportion of said variable-phase signal and applying said third outputpulse to said second integrator means to terminate the integration ofthe other of said integrators and to hold the output of said secondintegrator at a constant signal level;

h. means for dividing the output signal from said second integrator bythe output signal from said first integrator, to provide a ratio signal;

. means coupled to said divider means for selectively sampling the ratiosignal during the holding period of both the first and secondintegrators; and

j. means for indicating the selectively sampled ratio signal.

6. The apparatus as defined by claim 5 wherein said one and anotherportions of said reference signal are the zero-crossing points of ahalf-cycle of said reference signal, and the said portion of saidvariable-phase signal is the initial zero-crossing point of thehalf-cycle of said variable-phase signal.

7. Phase-measuring apparatus, comprising:

a. a first source of reference signals having a known frequency andphase;

b. a second source of signals having variable phase with respect to saidreference signals;

c. first trigger means coupled to said first source for providingstepped output signals corresponding to the positive and negativehalf-cycles of said reference signals;

. first and second integrator means having an integrate,

hold, and reset mode;

e. controlling means coupling said first trigger means to said first andsecond integrator means for initiating the integrate mode of saidintegrators, thereby to produce output signals from said integrators;

. hold means coupling said first trigger means to said first integratormeans for terminating the integrating mode of said first integrator.thereby to hold the output signal from said first integrator at aconstant value proportional to a first time interval of said half-cycleof said reference signal;

. second trigger means coupled to said second source for providingstepped output signals corresponding to the positive and negativehalf-cycles of said variable-phase signals;

h. hold means coupling said second trigger means to said secondintegrator means for terminating the integrating mode of said secondintegrator, thereby to hold the output signal from said secondintegrator at a constant value proportional to a second time intervalsaid variable-phase signals lags said reference signals;

i. dividing means coupled to the outputs of said first and secondintegrator means for dividing the output signal from said secondintegrator by the output signal from said first integrator to provide aratio signal at the output of said dividing means proportional to theratio of said second time interval to said first time interval;

j. sampling-and-holding means coupled to said dividing means forselecting, when triggered, specific portions of said ratio signal;

k. means coupled to said first trigger means for triggering saidsampling-and-holdingmeans during the simultaneous hold modes of both ofsaid integrators, thereby to produce a selected output signal from saidsampling-andholding means; and

1. means coupled to said sampling-and-holding means for displaying saidselected output signal.

8. The apparatus as described by claim 7 including reset means coupledto said first-mentioned holding means for resetting said first andsecond integrators.

9. The apparatus as described by claim 7 wherein said controlling meanscomprises a bistable flip-flop device triggered by the positive outputsignal from said first trigger means; said first-mentioned hold means isa single-shot multivibrator triggered by the negative output signal fromsaid first trigger means and producing an output pulse having a specificpulse width, the said pulse width determining the duration of time theoutput signal from the first integrator is held constant; and saidsecond-mentioned hold means comprises another bistable flip-flop device,the width of which output signal pulse determines the duration of timethe output signal from the second integrator is held constant.

10. The apparatus as described by claim 9 wherein said triggering meanscoupled to said sample-and-hold means comprises at least one single-shotmultivibrator having an output pulse triggered by the negative outputsig..al [rum said first trigger means.

11. Apparatus for measuring the phase difference between two electricalsignals which alternate about a given reference axis, comprising:

a. first means for producing a voltage which corresponds in amplitude toa time interval determined by the first intersection of a first of saidelectrical signals with the reference axis and the second intersectionof the same signal with the reference axis; second means for producing avoltage which corresponds in amplitude to a time interval related to thefirst intersection of the first electrical signal with the referenceaxis and the first intersection of the second electrical signal with thereference axis whereat the second electrical signal is changing inamplitude in the same direction that the first electrical signal waschanging at the time the first electrical signal intersected saidreference axis;

c. dividing means for dividing the voltage produced by said second meansby the voltage produced by said first means to provide a ratio voltagerepresentative of the phase difference between said first and secondsignals; and

d. means coupled to the dividing means for indicating the phasedilference between the two electrical signals in response to the ratiovoltage produced by said dividing means.

l2. The apparatus claimed in claim ll wherein the given reference axisis zero volts.

13. The apparatus claimed in claim ll wherein at least one of the twoelectrical signals is a sinusoidal signal.

14. A method for measuring the phase difference between two electricalsignals which alternate about a given reference axis, comprising thesteps of:

a. producing a first intermediate signal corresponding to a timeinterval determined by the first intersection of a first of saidelectrical signals with the reference axis and the second intersectionof the same signal with the reference axls;

b. producing a second intermediate signal corresponding to a timeinterval related to the first intersection of the first electricalsignal with the reference axis and the first intersection of the secondelectrical signal with the reference axis whereat the second electricalsignal is changing in amplitude in the same direction that the firstelectrical signal was changing at the time the first electrical signalintersected the reference axis;

dividing the second intermediate signal by the first intermediate signalto produce a ratio signal representative of the phase difference betweensaid first and second electrical signals; and

d. indicating the phase difference between the two electrical signals inresponse to the ratio signal produced.

15. The method claimed in claim 14 wherein the given reference axis iszero volts.

16. The method claimed in claim 14 wherein at least one of the twoelectrical signals is a sinusoidal signal.

17. The method claimed in claim 14 wherein the first and secondintermediate signals produced are, respectively, voltages correspondingin amplitude to the time intervals which they represent, and the ratiosignal produced is a voltage corresponding to the ratio of the timeintervals thus represented.

1. Apparatus for measuring the phase angle between two alternatingelectrical signals, comprising: a. first and second input means forrespectively receiving said two electrical signals; b. first circuitmeans coupled to said first input means for producing an output signalproportional to a first time interval between first and second referencepoints associated with one of said electrical signals; c. second circuitmeans coupled to said second input means for producing an output signalproportional to a second time interval between said first referencepoint and another reference point associated with the other of saidelectrical signals; d. dividing means coupled to said first and secondcircuit means for dividing the output signal of said second circuitmeans by the output signal of said first circuit means for providing anoutput signal from said dividing means representative of the ratio ofsaid second time interval to said first time interval; and e. meanscoupled to said dividing means for indicating the phase angle betweensaid electrical signals as a function of said ratio output signal. 2.The apparatus as described in claim 1 wherein said first and secondreference points are the zero-crossing points of said one electricalsignal, and said another reference point is a zero-crossing point ofsaid other electrical signal.
 3. The apparatus claimed in claim 1wherein at least one of the alternating electrical signals is asinusoidal signal.
 4. The apparatus as described in claim 3 wherein bothelectrical signals are sinusoidal signals and wherein said first andsecond reference points are the peak amplitude points of said onesinusoidal signal, and said another reference point is a peak amplitudepoint of said other sinusoidal signal.
 5. Phase-indicating apparatus,comprising: a. first source means for providing a reference signal ofknown frequency and phase; b. second source means for providing a signalof variable phase with respect to said reference signal; c. firstintegrator means for integrating a first DC voltage applied to saidfirst integrator means to produce, at the output of said firstintegrator means, a constant-level voltage corresponding to theintegration time of said first integrator means; d. second integratormeans for integrating a second DC voltage applied to said secondintegrator means to produce, at the output of said second integratormeans, a constant-level voltage corresponding to the integration time ofsaid second integrator means; e. first means for producing a firstoutput pulse in response to one portion of said reference signal andapplying said output pulse to said first and second integrator means,thereby to simultaneously initiate the integration by each of saidintegrators; f. second means for producing a second output pulse inresponse to another portion of said reference signal and applying saidoutput pulse to said first integrator means to terminate integrationtherein and to hold the output of said first integrator at a constantsignal level; g. third means for producing a third output pulse inresponse to a portion of said variable-phase signal and applying saidthird output pulse to said second integrator means to terminate theintegration of the other of said integrators and to hoLd the output ofsaid second integrator at a constant signal level; h. means for dividingthe output signal from said second integrator by the output signal fromsaid first integrator, to provide a ratio signal; i. means coupled tosaid divider means for selectively sampling the ratio signal during theholding period of both the first and second integrators; and j. meansfor indicating the selectively sampled ratio signal.
 6. The apparatus asdefined by claim 5 wherein said one and another portions of saidreference signal are the zero-crossing points of a half-cycle of saidreference signal, and the said portion of said variable-phase signal isthe initial zero-crossing point of the half-cycle of said variable-phasesignal.
 7. Phase-measuring apparatus, comprising: a. a first source ofreference signals having a known frequency and phase; b. a second sourceof signals having variable phase with respect to said reference signals;c. first trigger means coupled to said first source for providingstepped output signals corresponding to the positive and negativehalf-cycles of said reference signals; d. first and second integratormeans having an integrate, hold, and reset mode; e. controlling meanscoupling said first trigger means to said first and second integratormeans for initiating the integrate mode of said integrators, thereby toproduce output signals from said integrators; f. hold means couplingsaid first trigger means to said first integrator means for terminatingthe integrating mode of said first integrator, thereby to hold theoutput signal from said first integrator at a constant valueproportional to a first time interval of said half-cycle of saidreference signal; g. second trigger means coupled to said second sourcefor providing stepped output signals corresponding to the positive andnegative half-cycles of said variable-phase signals; h. hold meanscoupling said second trigger means to said second integrator means forterminating the integrating mode of said second integrator, thereby tohold the output signal from said second integrator at a constant valueproportional to a second time interval said variable-phase signals lagssaid reference signals; i. dividing means coupled to the outputs of saidfirst and second integrator means for dividing the output signal fromsaid second integrator by the output signal from said first integratorto provide a ratio signal at the output of said dividing meansproportional to the ratio of said second time interval to said firsttime interval; j. sampling-and-holding means coupled to said dividingmeans for selecting, when triggered, specific portions of said ratiosignal; k. means coupled to said first trigger means for triggering saidsampling-and-holding means during the simultaneous hold modes of both ofsaid integrators, thereby to produce a selected output signal from saidsampling-and-holding means; and l. means coupled to saidsampling-and-holding means for displaying said selected output signal.8. The apparatus as described by claim 7 including reset means coupledto said first-mentioned holding means for resetting said first andsecond integrators.
 9. The apparatus as described by claim 7 whereinsaid controlling means comprises a bistable flip-flop device triggeredby the positive output signal from said first trigger means; saidfirst-mentioned hold means is a single-shot multivibrator triggered bythe negative output signal from said first trigger means and producingan output pulse having a specific pulse width, the said pulse widthdetermining the duration of time the output signal from the firstintegrator is held constant; and said second-mentioned hold meanscomprises another bistable flip-flop device, the width of which outputsignal pulse determines the duration of time the output signal from thesecond integrator is held constant.
 10. The apparatus as described byclaim 9 wherein said triggeRing means coupled to said sample-and-holdmeans comprises at least one single-shot multivibrator having an outputpulse triggered by the negative output signal from said first triggermeans.
 11. Apparatus for measuring the phase difference between twoelectrical signals which alternate about a given reference axis,comprising: a. first means for producing a voltage which corresponds inamplitude to a time interval determined by the first intersection of afirst of said electrical signals with the reference axis and the secondintersection of the same signal with the reference axis; b. second meansfor producing a voltage which corresponds in amplitude to a timeinterval related to the first intersection of the first electricalsignal with the reference axis and the first intersection of the secondelectrical signal with the reference axis whereat the second electricalsignal is changing in amplitude in the same direction that the firstelectrical signal was changing at the time the first electrical signalintersected said reference axis; c. dividing means for dividing thevoltage produced by said second means by the voltage produced by saidfirst means to provide a ratio voltage representative of the phasedifference between said first and second signals; and d. means coupledto the dividing means for indicating the phase difference between thetwo electrical signals in response to the ratio voltage produced by saiddividing means.
 12. The apparatus claimed in claim 11 wherein the givenreference axis is zero volts.
 14. A method for measuring the phasedifference between two electrical signals which alternate about a givenreference axis, comprising the steps of: a. producing a firstintermediate signal corresponding to a time interval determined by thefirst intersection of a first of said electrical signals with thereference axis and the second intersection of the same signal with thereference axis; b. producing a second intermediate signal correspondingto a time interval related to the first intersection of the firstelectrical signal with the reference axis and the first intersection ofthe second electrical signal with the reference axis whereat the secondelectrical signal is changing in amplitude in the same direction thatthe first electrical signal was changing at the time the firstelectrical signal intersected the reference axis; dividing the secondintermediate signal by the first intermediate signal to produce a ratiosignal representative of the phase difference between said first andsecond electrical signals; and d. indicating the phase differencebetween the two electrical signals in response to the ratio signalproduced.
 15. The method claimed in claim 14 wherein the given referenceaxis is zero volts.
 15. The apparatus claimed in claim 11 wherein atleast one of the two electrical signals is a sinusoidal signal.
 16. Themethod claimed in claim 14 wherein at least one of the two electricalsignals is a sinusoidal signal.
 17. The method claimed in claim 14wherein the first and second intermediate signals produced are,respectively, voltages corresponding in amplitude to the time intervalswhich they represent, and the ratio signal produced is a voltagecorresponding to the ratio of the time intervals thus represented.